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  91912hkpc 20080324-s00002 no. a2123-1/7 ver.1.5 LC79430KNE overview the LC79430KNE is a large-scale do t matrix lcd common driver lsi. the LC79430KNE contains an 80-bit bidirectional shift register and is equi pped with a 4-level lcd driver. the inpu t/output pins for cascade connection can be used to further increase the ic?s number of bits. the LC79430KNE can be used in conjunction with segment driver lc79401kne (qip100e) to drive a wide-screen lcd panel. features ? on-chip lcd drive circuit (80 bits) ? display duty selection ranging from 1/64 to 1/256 ? on-chip input/output pins support a further increases in bit number ? supports externally supplied bias voltage ? on-chip 80-bit bidirectional shift register (supports 40-bit 2 division) ? supports single mode (80-bit shift register) and dual mode (40-bit 2 shift register) applications (1) o1 o80 (2) o80 o1 (3) o1 o40 and o41 o80 (4) o80 o41 and o40 o1 all four of the shift direction selection listed above all supported ? operating power supply voltage/operating temperature include v dd (logic section) : 2.7 to 5.5v/-20 to +85 c v dd -v ee (lcd section) : 12 to 32v/-20 to +85 c ? cmos process ? 100-pin flat plastic package (qip100e) ordering number : ena2123 cmos lsi dot-matrix lcd drivers specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appli ances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliab ility and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. single mode dual mode
LC79430KNE no. a2123-2/7 specifications absolute maximum ratings at ta = 25 2 c, v ss = 0v parameter symbol conditions ratings unit maximum supply voltage (logic) v dd max -0.3 to +7.0 v maximum supply voltage (lcd) v dd -v ee max *1 0 to 35 v maximum input voltage v i max -0.3 to v dd +0.3 v storage temperature tstg -40 to +125 c note * 1 the following relations between elements should be maintained: v dd v1 > v2 > v5 > v ee , v dd -v2 7v, v5-v ee 7v allowable operating ranges at ta = -20 to +85 c, v ss = 0v parameter symbol conditions min typ max unit supply voltage (logic) v dd 2.7 5.5 v supply voltage (lcd) v dd -v ee *2, 3 12 32 v input high level voltage v ih dio1, dio80, cp, m, dmin, mode, rs/ls, dispoff 0.8v dd v input low level voltage v il dio1, dio80, cp, m, dmin, mode, rs/ls, dispoff 0.2v dd v cp shift clock f cp cp 1 mhz cp pulse width t wc cp 63 ns setup time t setup dio1 cp, dio80 cp, dmin cp 100 ns hold time t hold dio1 cp, dio80 cp, dmin cp 100 ns cp rise time t r cp 50 ns cp fall time t f cp 50 ns note * 2 the following relations between elements should be maintained: v dd v1 > v2 > v5 > v ee , v dd -v2 7v, v5-v ee 7v * 3 when the power supply is turned on, power to the lcd driver is turned on after or simultaneously with the turning on of the logic section?s power supply. when the power supply is turned off, the logic power supply is turned off after or at the same time the lcd driver power supply is turned off. electrical characteristics at ta = 25 2 c, v dd = 2.7 to 5.5v parameter symbol conditions min typ max unit input high level current i ih v in =v dd , v dd =5.5v, dio1, dio80, cp, m, dmin, mode, rs/ls, dispoff 1 a input low level current i il v in =v ss , v dd =5.5v, dio1, dio80, cp, m, dmin, mode, rs/ls, dispoff -1 a output high level voltage v oh i oh =-0.4ma, dio1, dio80 v dd -0.4 v output low level voltage v ol i ol =0.4ma, dio1, dio80 0.4 v r on (1) v dd -v ee =30v, ? v de -v o ? =0.5v v dd =4.5v, o1 to o80 *4 1.0 k driver on resistance r on (2) v dd -v ee =20v, ? v de -v o ? =0.5v v dd =4.5v, o1 to o80 *4 1.0 k consumable current drain (1) i ss v dd -v ee =30v, cp=14khz no-load, v dd =5.5v ; v ss 100 a consumable current drain (2) i ee v dd -v ee =30v, cp=14khz no-load, v dd =5.5v ; v ee 100 a input capacitance ci f=1mhz ; cp 8 pf note * 4 v de = v1 or v2 or v5 or v ee , v1 = v dd , v2 = 16/17 (v dd -v ee ), v5 = 1/17 (v dd -v ee ) switching characteristics at ta = 25 2 c, v ss = 0v, v dd = 2.7 to 5.5v parameter symbol conditions min typ max unit t plh cl=15pf ; cp dio1, cp dio80 250 ns output delay time t phl cl=15pf ; cp dio1, cp dio80 250 ns
LC79430KNE no. a2123-3/7 package dimensions unit:mm (typ) 3151a pin assignment top view sanyo : qip100e(14x20) 20.0 23.2 14.0 17.2 0.15 0.8 (2.7) 3.0max 0.1 0.3 0.65 (0.58) 130 80 51 31 50 100 81 LC79430KNE o50 o49 o48 o47 o46 o45 o44 o43 o42 o41 o40 o39 o38 o37 o36 o35 o34 o33 o32 o31 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 o19 o20 o21 o22 o23 o24 o25 o26 o27 o28 o29 o30 1 2 3 45 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 49 47 48 46 45 44 42 43 41 40 39 37 38 36 35 34 32 33 31 50 o80 o79 o78 o77 o76 o75 o74 o73 o72 o71 o70 o69 o68 o67 o66 o65 o64 o61 o60 o59 o58 o57 o56 o55 o54 o53 o52 o51 o62 o63 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 82 84 83 85 86 87 89 88 90 91 92 94 93 95 96 97 99 98 100 81 nc dio80 nc v ee v5 v2 v1 nc dispoff v dd rs/ls v ss nc m mode cp dmin dio1 nc nc
LC79430KNE no. a2123-4/7 equivalent circuit block diagram 4 level lcd drive circuit (80 bits) level shifter (80bits) bidirectional shift register (80 bits) i/o i/o o1 o2 o3 o79 o80 v dd v ss v1 v2 v5 v ee m dispoff dio1 cp dio80 rs/ls mode dmin
LC79430KNE no. a2123-5/7 pin function pin no symbol i/o function 90 v dd 92 v ss 84 v ee supply v dd -v ss : logic power supply v dd -v ee : lcd drive circuit power supply 87 v1 86 v2 85 v5 supply lcd drive level power supply v1, v ee : selected level v2, v5 : unselected level 96 cp i bidirectional shift register shift clock (falling edge trigger) 98 82 91 95 97 dio1 dio80 rs/ls mode dmin i/o i/o i i i mode rs/ls data transfer direction dio1 dio80 dmin l (shift right) o1 o80 in out * l (single) h (shift left) o80 o1 out in * o1 o40 l (shift right) o41 o80 in out in o80 o41 h (dual) h (shift left) o40 o1 out in in * don?t care (may be set to either ?h? or ?l?) 94 m i lcd drive output alternation signal 89 dispoff i o1 to o80 output controlling input pins. 1 80 o1 o80 o lcd drive outputs the output levels are determined by th e combination of the output the data, the m signal, and the dispoff pin as shown in the table. m data dispoff output l l h v2 l h h v ee h l h v5 h h h v1 * * l v1 * don?t care (may be set to either ?h? or ?l?) 81 83 88 93 99 100 nc - must be left open.
LC79430KNE no. a2123-6/7 application example (lc79401kne/LC79430KNE) r/l seg318 seg319 seg320 seg1 dio1 dio80 v dd v ss v ee seg2 seg3 com240 com239 com238 com3 lcd panel 240 320 1/240 duty power supply circuit case of 1/n bias com2 com1 LC79430KNE #1 m rs/ls cp mode dmin v1 v2 v5 dispoff di1 to di4 o1 to o80 o1 to o80 o1 to o80 o1 to o80 o1 to o80 lc79401kne #4 lc79401kne #2 lc79401kne #1 m load cp v1 v3 v4 v ee v ss v dd cdi v ee v ss v dd cdi v ee v ss v dd cdi cdo cdo cdo r/l dispoff di1 to di4 m load cp v1 v3 v4 controller flm m load gnd v dd v ee r r cp di1 to di4 dispoff dispoff dio1 dio80 v dd v ss v ee LC79430KNE #3 m rs/ls cp mode dmin v1 v2 v5 dispoff r/l dispoff di1 to di4 m load cp v1 v3 v4 + - + - r (n-4)r r v1 v2 v3 v4 v5 + - + -
LC79430KNE no. a2123-7/7 switching characteristics diagram ps sanyo semiconductor co.,ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. regarding monolithic semiconductors, if you should intend to use this ic continuously under high temperature, high current, high voltage, or drastic temperature change, even if it is used within the range of absolute maximum ratings or operating conditions, there is a possibility of decrease reliability. please contact us for a confirmation. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equ ipment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. t wc cp dio1 (dio80) (dmin) dio80 (dio1) t r t f t setup t hold t plh , t phl 0.2v dd 0.8v dd this catalog provides information as of september, 2012. specifications and information herein are subject to change without notice.


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